SOFT MIXED SIGNAL CORPORATION, is a high-technology start-up company developing and marketing system level mixed signal integrated circuits for the newly emerging high-performance LAN, WAN and serial bus markets, mainly FAST ETHERNET 100Mb/s, ATM, XDSL: ADSL/VDSL/HDSL and FIBER CHANNEL.

We are  experienced in Ethernet, Fast Ethernet, Communications IC development,  Mixed signal PMD development for high speed ( 100Mb/s and over ), digital system architecture and DSP for data-communications. The developments are focused in high-performance analog, DSP, networking architectures for LAN/WAN  markets.

SOFT MIXED SIGNAL CORPORATION has been involved in developing specific designs to address these markets and applications. In addition to the system expertise being developed, the company has developed analog design methodologies, specific circuit topologies and techniques and layout methods that enable it to utilize industry standard digital CMOS processes to implement these designs. Traditional analog circuit techniques generally require more expensive and special processes (Bipolar, BiCMOS with double poly, thin film requirements) and do not lend themselves for large-scale integration due to methodology, cost, low yields, etc.  In our design methodology we employ fully differential topologies,  self -compensating stages with no additional capacitor compensation required,  noise immune mixed signal topology in digital VLSI IC environment and self-calibration for process variations. We offer these functions in the form of technology independent mega-cell blocks.

In addition to the above features, every function that we develop has the complete testability provided through embedded test structures and necessary generic test programs and algorithms. The physical design contains necessary multiplexing, isolating, scanning, etc to examine each particular block.  The designs are also accompanied by HDL (VHDL or Verilog) model descriptions to enable them to be incorporated into large VLSI components or used in system level simulations for board level designs. These models accurately describe the digital interface functionality and somewhat less accurately the analog behavior of the function, but provide enough information for high level functional simulations.

We have already developed the following core technologies based on pure digital CMOS process technology with 0.13um  to 0.5um design:

• FULLY DIFFERENTIAL EQUALIZERS, FILTERS

Proprietary CMOS analog adaptive equalizers up to 155 Mb/s.

Butterworth/Elliptic filters up to 7th order, 30Mhz employing GM and current mode continuous time.

• DIFFERENTIAL HIGH-SPEED DATA CONVERTERS FOR COMMUNICATIONS AND MULTIMEDIA

Flash/pipeline A/D, video DAC, sigma-delta ADC/DAC.

• FULLY DIFFERENTIAL ARCHITECTURES FOR NOISY DIGITAL ENVIRONMENTS, NOISE IMMUNE CIRCUIT DESIGN AND LAYOUT TOPOLOGIES.

• PROPRIETARY HIGH-SPEED (3V/5V IO Tolerance AND UP TO 3.125Gb/s) CLOCK RECOVERY.

• HIGH SPEED DSP CORES FOR QAM (CAP-16/32/64 COMPATIBLE ) & QPSK SIGNALING with ADC, DAC, AGC, CLOCK RECOVERY AND ALL ANALOG INTEGRATED FUNCTIONS.

• EXPERTISE IN CHANNEL/BUS MODEL DEVELOPMENT: TWISTED PAIR, COAX, FIBER, SERIAL/PARALLEL BUS ELECTRICAL CHARACTERISTICS.

Copyright © 2003 by Soft Mixed Signal Corporation